Compute ratio for SOTA model training workloads by hardware architecture by EOY 2028
One-OffIATecnologia2aManifold MarketsSem KYCDados de resolução verificadosRazoavelmente calibradoPrevisão da comunidade atualCustom ASIC 62.9%Líder entre 3 opções
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Play-money forecasting platform
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Atualizado há 14 horas
Desatualizado18/02/26, 02:38 UTC31/12/28, 23:59 UTC
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The ratio of compute (per FLOP) used for the flagship language models of the 10 leading companies/organizations at market close.
- Sources: company/lab announcements, consensus reporting
- (Hopefully) forward-compatible definitions:
- GPU: a general-purpose CPU specialized to handle embarassingly parallel workload tasks
- FPGA: an ASIC that implements logic gates through a reprogrammable medium (currently, LUTs and routing fabric), meaning the logic can be cost-effectively modified after finishing manufacturing, at a price at least one OOM less than manufacturing a new one.
- ASIC (excluding FPGAs): a non-reprogrammable IC that directly implements logic that would normally be handled at the programming-language layer in a CPU directly in the digital logic.
